Microelectronic substrates and substrate assemblies typically include a semiconductor material having features, such as memory cells, that are linked with conductive lines. The conductive lines can be formed by first forming trenches or other recesses in the semiconductor material, and then overlaying a conductive material (such as a metal) in the trenches. The conductive material is then selectively removed to leave conductive lines extending from one feature in the semiconductor material to another.
Electrolytic techniques have been used to both deposit and remove metallic layers from semiconductor substrates. For example, an alternating current can be applied to a conductive layer via an intermediate electrolyte to remove portions of the layer. In one arrangement, shown in FIG. 1, a conventional apparatus 60 includes a first electrode 20a and a second electrode 20b coupled to a current source 21. The first electrode 20a is attached directly to a metallic layer 11 of a semiconductor substrate 10 and the second electrode 20b is at least partially immersed in a liquid electrolyte 31 disposed on the surface of the metallic layer 11 by moving the second electrode downwardly until it contacts the electrolyte 31. A barrier 22 protects the first electrode 20a from direct contact with the electrolyte 31. The current source 21 applies alternating current to the substrate 10 via the electrodes 20a and 20b and the electrolyte 31 to remove conductive material from the conductive layer 11. The alternating current signal can have a variety of wave forms, such as those disclosed by Frankenthal et al. in a publication entitled, “Electroetching of Platinum in the Titanium-Platinum-Gold Metallization on Silicon Integrated Circuits” (Bell Laboratories), incorporated herein in its entirety by reference.
One drawback with the arrangement shown in FIG. 1 is that it may not be possible to remove material from the conductive layer 11 in the region where the first electrode 20a is attached because the barrier 22 prevents the electrolyte 31 from contacting the substrate 10 in this region. Alternatively, if the first electrode 20a contacts the electrolyte in this region, the electrolytic process can degrade the first electrode 20a. Still a further drawback is that the electrolytic process may not uniformly remove material from the substrate 10. For example, “islands” of residual conductive material having no direct electrical connection to the first electrode 20a may develop in the conductive layer 11. The residual conductive material can interfere with the formation and/or operation of the conductive lines, and it may be difficult or impossible to remove with the electrolytic process unless the first electrode 20a is repositioned to be coupled to such “islands.”
One approach to addressing some of the foregoing drawbacks is to attach a plurality of first electrodes 20a around the periphery of the substrate 10 to increase the uniformity with which the conductive material is removed. However, islands of conductive material may still remain despite the additional first electrodes 20a. Another approach is to form the electrodes 20a and 20b from an inert material, such as carbon, and remove the barrier 22 to increase the area of the conductive layer 11 in contact with the electrolyte 31. However, such inert electrodes may not be as effective as more reactive electrodes at removing the conductive material, and the inert electrodes may still leave residual conductive material on the substrate 10.
FIG. 2 shows still another approach to addressing some of the foregoing drawbacks in which two substrates 10 are partially immersed in a vessel 30 containing the electrolyte 31. The first electrode 20a is attached to one substrate 10 and the second electrode 20b is attached to the other substrate 10. An advantage of this approach is that the electrodes 20a and 20b do not contact the electrolyte. However, islands of conductive material may still remain after the electrolytic process is complete, and it may be difficult to remove conductive material from the points at which the electrodes 20a and 20b are attached to the substrates 10.
Another method for removing material from a semiconductor substrate is chemical-mechanical planarization (“CMP”). Conventional CMP techniques include engaging the substrate with a polishing pad in a chemically active environment and then moving the polishing pad and/or the substrate relative to each other to chemically and/or mechanically remove material from the face of the substrate. The polishing pad can include fixed abrasive particles to abrade material from the substrate, or abrasive particles can be suspended in a liquid slurry disposed between the polishing pad and the substrate.
One drawback with conventional CMP techniques is that it may be extremely difficult or impossible to remove certain materials (such at platinum) from the substrate with such techniques. Alternatively, chemically etching materials, such as platinum, is not appropriate when the material is to be removed in a single direction (i.e., anisotropically) rather than in any direction (isotropically). Another drawback with conventional CMP techniques is that certain hard materials may be difficult to remove without applying a very large normal force to the substrate. Such a force can damage the substrate and can reduce the life expectancy of the CMP equipment.
International Application PCT/US00/08336 (published as WO/00/59682) discloses an apparatus having a first chamber for applying a conductive material to a semiconductor wafer, and a second chamber for removing conductive material from the semiconductor wafer by electropolishing or chemical-mechanical polishing. The second chamber includes an anode having a paint roller configuration with a cylindrical mechanical pad that contacts both an electrolyte bath and the face of the wafer as the anode and the wafer rotate about perpendicular axes. A cathode, which can include a conductive liquid isolated from the electrolytic bath, is electrically coupled to an edge of the wafer. One drawback with this device is that it, too, can leave islands of residual conductive material on the wafer.